Configuration
TMRX uses TOML format for configuration, passed to the tmrx pass with the -c flag:
tmrx -c tmrx_config.toml
If no configuration file is provided, TMRX uses built-in default settings.
Configuration Precedence
Configuration is resolved in layers, with later layers overriding earlier ones:
-
Global defaults — built-in hardcoded defaults
-
Global config —
[global]section in TOML -
Group config —
[group.<name>]sections -
Module config —
[module.<name>]sections -
Verilog attributes —
(* tmrx_* *)on modules -
Specific instance config —
[specific_module."<name>"]sections (highest priority)
This layered approach allows you to set sensible defaults globally and override them for specific modules or instances.
Global Configuration
The [global] section sets default values for all modules:
[global]
tmr_mode = "LogicTMR"
tmr_voter = "Default"
preserve_module_ports = false
clock_port_names = ["clk_i", "clk"]
reset_port_names = ["rst_ni", "rst_n"]
expand_clock = false
expand_reset = false
[global.logic]
insert_voter_after_ff = true
insert_voter_before_ff = false
logic_path_1_suffix = "_a"
logic_path_2_suffix = "_b"
logic_path_3_suffix = "_c"
[global.full_module]
insert_voter_before_modules = false
insert_voter_after_modules = true
Module Groups
Groups allow you to apply the same configuration to multiple modules. Assign groups inline in each module scope:
[module.uart_rx]
groups = ["safety_critical"]
[module.uart_tx]
groups = ["safety_critical"]
[module.debug_controller]
groups = ["non_critical"]
Then define the group configurations:
[group.safety_critical]
tmr_mode = "FullModuleTMR"
preserve_module_ports = false
[group.safety_critical.full_module]
insert_voter_after_modules = true
[group.non_critical]
tmr_mode = "None"
|
Group names are scoped under |
Per-Module Configuration
Configure specific modules by name using the module scope:
[module.alu]
tmr_mode = "LogicTMR"
expand_reset = true
[module.alu.logic]
insert_voter_after_ff = true
[module.register_file]
tmr_mode = "FullModuleTMR"
preserve_module_ports = true
[module.register_file.full_module]
insert_voter_after_modules = true
Specific Instance Configuration
When using yosys-slang, parameterized modules are often uniquified with names like module$hierarchy.path.
To configure a specific instance:
[specific_module."submodule$top.cpu.u_alu"]
tmr_mode = "FullModuleTMR"
preserve_module_ports = true
[specific_module."submodule$top.cpu.u_alu".full_module]
insert_voter_after_modules = true
|
Specific module configurations must include a |
Verilog Attribute Configuration
You can configure TMR directly in your Verilog source using attributes:
(* tmrx_tmr_mode = "FullModuleTMR" *)
(* tmrx_preserve_module_ports = "1" *)
(* tmrx_insert_voter_after_ff = "1" *)
module critical_module (
input wire clk_i,
input wire rst_ni,
input wire [7:0] data_i,
output wire [7:0] data_o
);
// ...
endmodule
| Attribute | Values | Description |
|---|---|---|
|
|
TMR strategy |
|
|
Voter type |
|
|
Keep original interface |
|
|
Voters before FFs (planned) |
|
|
Voters after FFs |
|
|
Triplicate clock |
|
|
Triplicate reset |
|
|
Assign to group(s) |
|
|
Clock port names |
|
|
Reset port names |
|
For list values in attributes, use semicolon ( |